EXACT

Full Chip LPE Rule File Generator

EXACT delivers the most accurate interconnect models for nanometer semiconductor processes and generates full chip layout parameter extraction (LPE) rule files. EXACT’s powerful 3D field solver and scripting language allows support for any full chip parasitic extractor.

Key Features

• Powerful 3D field solver supports non-planar semiconductor profiles for accurately modeling irregular etch profiles, dual damascene, and low-K dielectrics
  
• 3D field solver calculates interconnect capacitance models to deliver highest accuracy LPE rule files without compromising extraction performance
  
• Intuitive and user-friendly graphical interface for process layer description and test structure definition for beginner and experienced process technology developers
  
• Standard mode of operation handles most conventional processes whereas advanced mode can be used for more complex and non-planar process definition
  
• Powerful scripting language allows data manipulation into any format

Rev. 102507_28