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VICTORY Cell:

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VICTORY Cell
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VICTORY Cell

3D PROCESS SIMULATOR FOR LARGE STRUCTURES

VICTORY Cell is a fast, layout-driven 3D process simulator specifically designed for large structures. Simulation speed is derived from careful selection of process models suitable for devices such as CMOS image sensors, TFT arrays, power devices, and other large geometry structures.

Key Features

• Fast 3D process-modeling of etch, deposition, implantation, and diffusion
• GDSII layout-driven
• Accurate and fully multi-threaded 3D Monte Carlo implantation
• Mesh algorithms optimized for large device structures
• Automated layout-driven mesh generation
• User-controlled mesh placement
• Easy to learn and user-friendly SUPREM-like syntax
• Interface to 3D Device simulators ATLAS 3D and VICTORY Device
• Silvaco's strong encryption is available to protect valuable customer and third party intellectual property.

GDSII Layout Driven Process Simulation

• Layout driven 3D device structure creation with high-aspect ratio meshing capabilities

Flat panel LCD and TFT circuits.

Accurate 3D Etch and Deposition

• VICTORY Cell simulates realistic geometric etch and deposition steps very efficiently with unstructured tetrahedral mesh
• VICTORY Cell can use either geometrical or physically based etch and deposition. It can successfully deal with high aspect ratio structures

MEMS device after isotropic release etch.

Robust algorithm based on the adaptive refinement of a tetrahedral grid, successfully solves some difficult problems such as “de-looping” and “void creation”. Fast, typical times are from few seconds to couple of minutes.

3D Monte Carlo Implantation

• 3D Monte-Carlo ion implantation with full account for crystal orientations in silicon physics-based treatment of ion stopping including the effects of damage and amorphization

Buffered Super Junction LDMOS

Net doping in the LDMOS structure.

2D cutline through n-region.

2D cutline through p-region.

Electric field distribution with 80 volts applied to the drain.

Impact ionization rate distribution at 80 volts drain voltage.

CMOS Image Sensor

Rev. 110210_05